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This pattern was used in a round robin for evaluating the surface mount land patterns described in IPC-SM-782. It contains land sites for the following components: 68 I/O LCC, 44 I/O LCC, 100 I/O fine pitch QFP, 16 I/O DIP; 24 I/O SOIC, MELF, SOT-23, RC1206 and CC1825. Two circuitry layers are provided; a solder mask layer and a solder paste stencil layer (4 pcs 29., cm x 36 cm). Available in film only.
